Implement all Instructions from Xenia CPU Tests#146
Implement all Instructions from Xenia CPU Tests#146tomcl7 wants to merge 59 commits intohedge-dev:mainfrom
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… wise they perform the same operation
… wise they perform the same operation
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Your instructions are very useful. Shall you implement these functions: (fsqrte, lq) - they are used in a lot of projects(but I don't understand how to use xenia/test-bin for debug). I'm working on some recomp project. |
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Hello there, I just wanted to say you've done a great job in terms of translating all the oppcodes in the reccompiler. I'm trying to translate a different game (SM Edge of Time), but I am running into an issue where I don't have all the oppcodes recognized. bdnzt Any chance you could help guide me in the right direction? |
You can try this: https://github.com/testdriveupgrade/XenonRecompUnlim (works without simd_wrapper, but less commands) |
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@testdriveupgrade The one that you made https://github.com/testdriveupgrade/XenonRecompUnlimited/ mostly works! |
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maybe I've forgotten to add it, just borrow from this: |
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I actually managed to fork the repository that you made and edited the code myself with the proper translation. I have already updated my repository and it works! https://github.com/EOT-RecompTest/XenonRecompUnlimited My next issue that I have is that I cannot find the sizes of the addresses/functions for the jump tables. Do you happen to have a tutorial on how to do that? Address Function Instruction |
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1)try to find setjmp and longjmp, game can use them(by finding RtlUnwind , or if not, it means game not use them): |
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Why did you close it? |
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It seemed there was no interest from the maintainers of this repository. I will reopen a PR if there is interest. |
This is the reason, why a lot of developers create their own forks(like Xenia Canary for example). Also what are you think about my guide (it's a first part: https://www.youtube.com/watch?v=w-1Pgn5V3wY). Later I'll make it better and we can add on the main page in readme.md for helping to begginers |
It's not that there's no interest, we're just taking a break from recompilation projects. The PRs will take a while to get reviewed. |
All of the instructions have been tested against Xenia's CPU tests and are passing.
The only remaining unimplemented instructions from the CPU tests are vslo and vrlo.